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> 【已刪除】110年 - 110 國立中山大學_碩士班招生考試_電機系(戊組):計算機結構#106058
【已刪除】110年 - 110 國立中山大學_碩士班招生考試_電機系(戊組):計算機結構#106058
科目:
中山◆電機◆計算機結構 |
年份:
110年 |
選擇題數:
0 |
申論題數:
23
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所屬科目:
中山◆電機◆計算機結構
選擇題 (0)
申論題 (23)
【已刪除】1. A. What is the design idea of a multicycle processor?
【已刪除】B. What are the advantages and disadvantages of a multicycle processor?
【已刪除】C. Draw the hardware architecture of a multicycle datapath of a MIPS processor.
【已刪除】D. What are the differences between the hardware architecture of a multicycle MIPS processor and that of a five-pipeline-stage MIPS processor? Please also explain why these differences are necessary.
【已刪除】2. A. What is dynamic branch prediction?
【已刪除】B. How to deal with the situation when the prediction is inaccurate?
【已刪除】C. What is the state diagram of a 2-bit dynamic branch predictor? How to implement this 2- bit dynamic branch predictor?
【已刪除】D. How can this branch predictor be integrated into a five-pipeline-stage MIPS processor?
【已刪除】3. A. What is virtual memory?
【已刪除】B. What is TLB (translation-lookaside buffer)? Why do we need TLB?
【已刪除】C. Draw the architecture of a virtual memory based on TLB and explain how this architecture
【已刪除】D. What are page faults and TLB misses? How to handle pages faults and TLB misses?
【已刪除】4. A. (1) Draw the hardware architecture of a 32-bit unsigned multiplier by using only one 32- bit ALU, one 32-bit register, one 64-bit register, and one control circuit.
【已刪除】 (2) Explain the operational flow of this multiplier.
【已刪除】(3) What are advantages and disadvantages of this multiplier design?
【已刪除】B. (1) Draw the hardware architecture of a faster 32-bit unsigned multiplier based on loop unrolling.
【已刪除】 (2) Explain the operational flow of this multiplier.
【已刪除】(3) What are advantages and disadvantages of this multiplier design?
【已刪除】A. Big Endian
【已刪除】B. Write-back scheme of a cache
【已刪除】C. Non-volatile memory
【已刪除】D. Out-of-order execution
【已刪除】E. Floating point works.