申論題

[Problem 5] (20%) Use the following code fragment: 

(b) (10%) Assuming the five-stage instruction pipeline with a single-cycle delayed branch and normal forwarding and bypassing hardware, schedule the instructions in the loop including the branch-delay slot. You may reorder instructions and modify the individual instruction operands, but do not undertake other loop transformations that change the number of op- code of instructions in the loop. Show a pipeline timing diagram and compute the number of cycles needed to execute the entire loop.