110年 - 110 國立中山大學_碩士班招生考試_電機系(己組)：計算機結構#104305

科目：研究所、轉學考(插大)◆計算機結構 | 年份：110年 | 選擇題數：0 | 申論題數：19

試卷資訊

所屬科目：研究所、轉學考(插大)◆計算機結構

選擇題 (0)

申論題 (19)

A. (2%) What is the design idea of a multicycle processor?

B. (4%) What are the advantages and disadvantages of a multicycle processor?

C. (8%) Draw the hardware architecture of a multicycle datapath of a MIPS processor.

D. (6%) What are the differences between the hardware architecture of a multicycle MIPS processor and that of a five-pipeline-stage MIPS processor? Please also explain why these differences are necessary.

A. (3%) What is dynamic branch prediction?

B.(3%) How to deal with the situation when the prediction is inaccurate?

C. (9%) What is the state diagram of a 2-bit dynamic branch predictor? How to implement this 2- bit dynamic branch predictor?

D. (5%) How can this branch predictor be integrated into a five-pipeline-stage MIPS processor?

A. (3%) What is virtual memory?

B.(3%) What is TLB (translation-lookaside buffer)? Why do we need TLB?

C. (9%) Draw the architecture of a virtual memory based on TLB and explain how this architecture works.

D. (5%) What are page faults and TLB misses? How to handle pages faults and TLB misses?

A. (4%) (1) Draw the hardware architecture of a 32-bit unsigned multiplier by using only one 32- bit ALU, one 32-bit register, one 64-bit register, and one control circuit. (4%) (2) Explain the operational flow of this multiplier. (2%) (3) What are advantages and disadvantages of this multiplier design?

B. (4%)(1) Draw the hardware architecture of a faster 32-bit unsigned multiplier based on loop unrolling. (4%) (2) Explain the operational flow of this multiplier. (2%) (3) What are advantages and disadvantages of this multiplier design?

A. (4%) Big Endian

B. (4%) Write-back scheme of a cache

C. (4%) Non-volatile memory

D. (4%) Out-of-order execution

E.(4%) Floating point