1 實作一個半加器(half adder)時,邏輯閘(logic gate)a 用來運算「和(sum)」,邏輯閘 b 用來運算「進
位(carry)」,則此二邏輯閘(a,b)為何?
(A)(a,b)=(and, or)
(B)(a,b)=(and, xor)
(C)(a,b)=(xor, and)
(D)(a,b)=(xor, or)
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統計: A(39), B(122), C(290), D(36), E(0) #1610779
統計: A(39), B(122), C(290), D(36), E(0) #1610779