4. An enhancement NMOS transistor is connected in the bias circuit of Fig. 3 with VG = 4 V and RS = 1 kΩ. The transistor has Vt = 2 V and k'n(W/L) = 2 mA/V2. (a) What bias current “ID” results? (10%)

5. The NMOS transistors in the circuit of Fig. 4 have Vt = 1 V, μnCox = 120 μA/V2, λ = 0, and L1 = L2 = 1 μm. Find required values to obtain the voltage and current values indicated. (a) Find the required value of gate width “W1” for Q1. (10%)