(b) Assume there is no forwarding in this pipelined processor. Indicate hazards and add NOP instructions to eliminate them.

(e) What is the clock cycle time if we must support ALU, branch, load/store instructions? (Hint: You need to find the overall latencies of the blocks in the longest path required to execute an instruction.)

(a) What is the clock cycle time in a pipelined and non-pipelined processor?

(b) What is the total latency of an LW instruction in a pipelined and non-pipelined processor? (5%)

(a) Indicate dependences and their type.

(a) Consider a direct-mapped cache with 16KB of data and 16-byte blocks, assuming a 32-bit 300ps address. What is the length of the tag field? How many total bits are required, assuming a valid bit is used?

(b) Assume an instruction cache miss rate for gcc of 2% and a data cache miss rate of 4%. If a machine has a CPI of 2 without any memory stalls and the miss penalty is 40 cycles for all misses, determine how much faster a machine would run with a perfect cache that never missed. Assume 36% of instructions are loads/stores.

(a) Page fault

(b) Direct memory access (DMA)

1. Use Laplace Transform to solve the differential equation y"+4y'+3y=e'；y(0)=0,y'(0)=2.

2.The points A(1,-21), B(0,1,6) and C(-3,4,-2) form the vertices of a triangle. Calculate the angle between the line AB and the line from A to the midpoint P of . You do not need to give the explicit value of the angle. Just express the angle using inverse trigonometric functions. Hint: use dot product for two vectors AB and AP which is a scalar equal to the multiplication of the lengths of the two vectors and the cosine of the angle between the two vectors.