5.2 Assume each block requires 2 extra valid bits. What is the size of the cache memory?

6. Given the following datapath for the single-cycle implementation of a computer and thedefinition of its instructions:Assume that the instructions are fixed length and the operation time for the major functional units inthis implementation are as follows:●Memory units: 2ns●ALU and adders: 2ns●Register file (read or write): 1ns●Multiplexers, control unit, PC accesses, sign extension unit, and wires: no delay Please compute the required time for each instruction and explain why.

7. The following series of branch outcomes occurs for a single branch in a program. T means the branch is taken； N means the branch is not taken. TTTNNTTT How many instances of this branch instruction are mis-predicted with a 1-bit and 2-bit local branch predictor, respectively? Assume the Branch History Table (BHT) are initialized to the N state. You may assume that this is the only one branch in this program.

8.A computer whose processes have 1024 pages in their address spaces keeps its page tables in memory. The overhead required for reading a word from the page table is 500 ns. In order to reduce the overhead, the computer has Translation Lookaside Buffer(TLB), which holds 32 (virtual page, physical page frame) pairs, and can do a look up in 100 ns. What hit rate is needed to reduce the mean overhead to 200 ns?

2.1 How much power saving would be achieved by turning off 60% of the servers?

1.1 Show that AB is idempotent if AB = BA.

1.2 Show that if A is idempotent, then is idempotent.

1.3 Is A+B idempotent? Justify your answer.

1.4Find all values of k for which kA is also idempotent. 

2.1 Sketch the periodic function x(t) over the time interval -10 s t ≤ 20. 

2.2 Determine the DC coefficient of the Fourier series, ao.

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